Nije direktno vezano za temu, u pitanju je Clock kao nezaobilazna komponenta uz bilo koji eksterni ADC/DAC i evo jedan nov dokument koji se bavi problemom i nacinima resavanja Jitter-a:
http://www.silabs.com/Support%20Documents/TechnicalDocs/AN687.pdf
Citat:
As clock speeds and communication channels run at ever higher frequencies, engineers who have previously had little need to consider clock jitter and phase noise are finding that they need to increase their knowledge of these subjects. This primer provides an overview of jitter, offers practical assistance in making jitter measurements, and examines the role of phase-locked loops (PLLs).